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08/15/2023
SEER: Super-Optimization Explorer for HLS using E-graph Rewriting with MLIR
High-level synthesis (HLS) is a process that automatically translates a ...
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08/01/2023
Datapath Verification via Word-Level E-Graph Rewriting
Formal verification of datapath circuits is challenging as they are subj...
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03/03/2023
Automating Constraint-Aware Datapath Optimization using E-Graphs
Numerical hardware design requires aggressive optimization, where design...
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05/30/2022
Combining E-Graphs with Abstract Interpretation
E-graphs are a data structure that compactly represents equivalent expre...
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05/19/2022
Automatic Generation of Complete Polynomial Interpolation Hardware Design Space
Hardware implementations of complex functions regularly deploy piecewise...
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04/25/2022
Automatic Datapath Optimization using E-Graphs
Manual optimization of Register Transfer Level (RTL) datapath is commonp...
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03/17/2022