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04/02/2019
DeLTA: GPU Performance Model for Deep Learning Applications with In-depth Memory System Traffic Analysis
Training convolutional neural networks (CNNs) requires intense compute t...
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07/13/2018
What Your DRAM Power Models Are Not Telling You: Lessons from a Detailed Experimental Study
Main memory (DRAM) consumes as much as half of the total system power in...
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05/08/2018
Exploiting Row-Level Temporal Locality in DRAM to Reduce the Memory Access Latency
This paper summarizes the idea of ChargeCache, which was published in HP...
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05/08/2018
SoftMC: Practical DRAM Characterization Using an FPGA-Based Infrastructure
This paper summarizes the SoftMC DRAM characterization infrastructure, w...
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05/08/2018
LISA: Increasing Internal Connectivity in DRAM for Fast Data Movement and Low Latency
This paper summarizes the idea of Low-Cost Interlinked Subarrays (LISA),...
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05/08/2018
Voltron: Understanding and Exploiting the Voltage-Latency-Reliability Trade-Offs in Modern DRAM Chips to Improve Energy Efficiency
This paper summarizes our work on experimental characterization and anal...
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05/08/2018
Flexible-Latency DRAM: Understanding and Exploiting Latency Variation in Modern DRAM Chips
This article summarizes key results of our work on experimental characte...
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05/07/2018
RowClone: Accelerating Data Movement and Initialization Using DRAM
In existing systems, to perform any bulk data movement operation (copy o...
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05/04/2018
Exploiting the DRAM Microarchitecture to Increase Memory-Level Parallelism
This paper summarizes the idea of Subarray-Level Parallelism (SALP) in D...
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05/04/2018
Tiered-Latency DRAM: Enabling Low-Latency Main Memory at Low Cost
This paper summarizes the idea of Tiered-Latency DRAM (TL-DRAM), which w...
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05/04/2018
Adaptive-Latency DRAM: Reducing DRAM Latency by Exploiting Timing Margins
This paper summarizes the idea of Adaptive-Latency DRAM (AL-DRAM), which...
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12/21/2017
Improving DRAM Performance by Parallelizing Refreshes with Accesses
Modern DRAM cells are periodically refreshed to prevent data loss due to...
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05/29/2017
Understanding Reduced-Voltage Operation in Modern DRAM Chips: Characterization, Analysis, and Mechanisms
The energy consumption of DRAM is a critical concern in modern computing...
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11/30/2016
Buddy-RAM: Improving the Performance and Efficiency of Bulk Bitwise Operations Using DRAM
Bitwise operations are an important component of modern day programming....
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10/30/2016
Understanding and Exploiting Design-Induced Latency Variation in Modern DRAM Chips
Variation has been shown to exist across the cells within a modern DRAM ...
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04/27/2016
Reducing DRAM Latency at Low Cost by Exploiting Heterogeneity
In modern systems, DRAM-based main memory is significantly slower than t...
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03/28/2016