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09/09/2023
MemSPICE: Automated Simulation and Energy Estimation Framework for MAGIC-Based Logic-in-Memory
Existing logic-in-memory (LiM) research is limited to generating mapping...
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08/04/2023
SoftFlow: Automated HW-SW Confidentiality Verification for Embedded Processors
Despite its ever-increasing impact, security is not considered as a desi...
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05/22/2023
IMBUE: In-Memory Boolean-to-CUrrent Inference ArchitecturE for Tsetlin Machines
In-memory computing for Machine Learning (ML) applications remedies the ...
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04/12/2023
Gate Camouflaging Using Reconfigurable ISFET-Based Threshold Voltage Defined Logic
Most chip designers outsource the manufacturing of their integrated circ...
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11/07/2022
Hardware Security Primitives using Passive RRAM Crossbar Array: Novel TRNG and PUF Designs
With rapid advancements in electronic gadgets, the security and privacy ...
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07/21/2022
PA-PUF: A Novel Priority Arbiter PUF
This paper proposes a 3-input arbiter-based novel physically unclonable ...
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12/24/2021
A Parallel SystemC Virtual Platform for Neuromorphic Architectures
With the increasing interest in neuromorphic computing, designers of emb...
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09/06/2021
QFlow: Quantitative Information Flow for Security-Aware Hardware Design in Verilog
The enormous amount of code required to design modern hardware implement...
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07/19/2021
Deceptive Logic Locking for Hardware Integrity Protection against Machine Learning Attacks
Logic locking has emerged as a prominent key-driven technique to protect...
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07/05/2021
Logic Locking at the Frontiers of Machine Learning: A Survey on Developments and Opportunities
In the past decade, a lot of progress has been made in the design and ev...
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01/17/2021
Brightening the Optical Flow through Posit Arithmetic
As new technologies are invented, their commercial viability needs to be...
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01/14/2021
ANDROMEDA: An FPGA Based RISC-V MPSoC Exploration Framework
With the growing demands of consumer electronic products, the computatio...
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01/05/2021
An Investigation on Inherent Robustness of Posit Data Representation
As the dimensions and operating voltages of computer electronics shrink ...
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11/20/2020
Challenging the Security of Logic Locking Schemes in the Era of Deep Learning: A Neuroevolutionary Approach
Logic locking is a prominent technique to protect the integrity of hardw...
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05/30/2020
CLARINET: A RISC-V Based Framework for Posit Arithmetic Empiricism
Many engineering and scientific applications require high precision arit...
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03/14/2018
Efficient Realization of Givens Rotation through Algorithm-Architecture Co-design for Acceleration of QR Factorization
We present efficient realization of Generalized Givens Rotation (GGR) ba...
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02/10/2018
Achieving Efficient Realization of Kalman Filter on CGRA through Algorithm-Architecture Co-design
In this paper, we present efficient realization of Kalman Filter (KF) th...
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12/14/2016
Efficient Realization of Householder Transform through Algorithm-Architecture Co-design for Acceleration of QR Factorization
We present efficient realization of Householder Transform (HT) based QR ...
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10/27/2016
Accelerating BLAS and LAPACK via Efficient Floating Point Architecture Design
Basic Linear Algebra Subprograms (BLAS) and Linear Algebra Package (LAPA...
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10/20/2016