research
∙
09/28/2022
Callipepla: Stream Centric Instruction Set and Mixed Precision for Accelerating Conjugate Gradient Solver
The continued growth in the processing power of FPGAs coupled with high ...
share
research
∙
09/06/2022
TAPA: A Scalable Task-Parallel Dataflow Programming Framework for Modern FPGAs with Co-Optimization of HLS and Physical Design
In this paper, we propose TAPA, an end-to-end framework that compiles a ...
research
∙
08/23/2022
SASA: A Scalable and Automatic Stencil Acceleration Framework for Optimized Hybrid Spatial and Temporal Parallelism on HBM-based FPGAs
Stencil computation is one of the fundamental computing patterns in many...
research
∙
05/16/2022
TopSort: A High-Performance Two-Phase Sorting Accelerator Optimized on HBM-based FPGAs
The emergence of high-bandwidth memory (HBM) brings new opportunities to...
research
∙
11/24/2021
Serpens: A High Bandwidth Memory Based Accelerator for General-Purpose Sparse Matrix-Vector Multiplication
Sparse matrix-vector multiplication (SpMV) multiplies a sparse matrix wi...
research
∙
10/12/2020
When HLS Meets FPGA HBM: Benchmarking and Bandwidth Optimization
With the recent release of High Bandwidth Memory (HBM) based FPGA boards...
research
∙
09/23/2020
